Apparatus and method for improved chopping mixer

ABSTRACT

An apparatus and method for an improved chopping mixer ( 100 ) having a bipolar mixer stage ( 140 ) for mixing signals (Ip, In, LOp, LOn) received thereby; an output chopping stage ( 160 ); and an AC coupling stage ( 150 ) for coupling the mixed signal to the output chopping stage. The signal prior to the chopping output stage is centered at the chopping clock frequency rather than DC. AC coupling allows removal of common mode signal in a desired frequency range. Also, the second order component present on each single ended output will also be DC blocked by the AC coupling capacitors, resulting in improved second order IP2 performance.

FIELD OF THE INVENTION

[0001] This invention relates to chopping mixers, and particularly (though not exclusively) to radio frequency circuitry such as direct conversion receivers.

BACKGROUND OF THE INVENTION

[0002] In the field of this invention it is known to use direct conversion or zero-IF receivers in radio receivers for applications such as cellular telephony. In such receivers, it is necessary to maintain the spectral purity of the channel used for reception. Because of limited narrow band selectivity, second order intermodulation distortion (IM2) presents an undesired spectral component within the signal band of interest. This occurs when two or more interfering signals, whose difference in frequency is less than the IF bandwidth of the desired signal, mix with one another due to some second order nonlinearity and produce a baseband spectral component. To minimize the effects of second order intermodulation within critical circuit blocks in the signal path, it is known in the art to use differential circuits. In theory, differential circuits have infinite attenuation to second order intermodulation distortion; however, in reality this is far from the truth, due in no small part to device mismatches, parametric imbalance, imperfect layout, and other device characteristic inequalities that cause imbalances which provide a lower than desired second order input intercept point (IIP2). As will be appreciated by those skilled in the art, the best IIP2 achieved to date in the integrated mixer art may fall significantly short of system requirements. It would be extremely advantageous, therefore, to provide improved chopping mixer performance so as to allow the above difficulties to be overcome. It would be of greater advantage to apply this improved chopping mixer performance to wireless and wireline communications, devices that employ mixer circuits, switches, and other components that exhibit parametric mismatch or imbalance.

[0003] United States patent U.S. Pat. No. 5,859,559 (RAYTHEON) describes a mixer structure suitable for inclusion as part of an integrated circuit. Spurious signals is avoided by introducing trickle currents which enhance the transconductance of an input differential amplifier.

[0004] United Kingdom Patent Application No. GB-A-2 151863 (Toshiba) describes an amplifier circuit having first and second differential amplifiers. A switch circuit enables the dynamic range of the output signals to be increased. First and second outputs are applied to a load so as to obtain the product of the first and second signals.

[0005] It is an object of the present invention to provide method and apparatus for improving chopping mixer performance wherein the abovementioned disadvantage(s) may be alleviated.

STATEMENT OF INVENTION

[0006] In accordance with a first aspect of the present invention there is provided a chopping mixer as claimed in claim 1.

[0007] In accordance with a second aspect of the present invention there is provided a method of operating a chopping mixer as claimed in claim 13.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Method and apparatus for improving chopping mixer performance utilising the present invention will now be described, by way of example only, with reference to the accompanying drawing(s), in which:

[0009]FIG. 1 shows a schematic circuit diagram of a first AC chopping mixer in a direct conversion radio receiver;

[0010]FIG. 2 shows a waveform timing diagram of clock signals used in the AC chopping mixer of FIG. 1; and

[0011]FIG. 3 shows a schematic circuit diagram of a second AC chopping mixer.

DESCRIPTION OF PREFERRED EMBODIMENTS

[0012] Referring firstly to FIG. 1, an AC chopping mixer 100 for use in a direct conversion radio receiver 110 is shown. The mixer 100 has an input chopper cell 120 constituted of two pairs of MOSFET chopper transistors 122 & 124 and 126 & 128. The chopper transistors 122-128 are coupled to receive chopper clock signals clkp and clkn (see FIG. 2) and cross-coupled differential input signals RFp and RFn at an RF input port. The input chopper cell 120 produces chopped differential voltage output signals Vip and Vin.

[0013] A voltage-current (V-I) converter 130 is constituted of bipolar transistors 132 and 134 that have their base electrodes commonly coupled to receive a bias voltage Vb. Outputs from the chopper transistors 122-128 of the input chopper cell 120 are connected respectively to emitter electrodes of the bipolar transistors 132 and 134 in the voltage-current converter 130, so that the transistors sink at their collector electrodes currents Ip and In that are proportional to respectively the voltage output signals Vip and Vin from the input chopper cell 120.

[0014] A radio frequency (RF) mixer cell 140 is constituted of two pairs of bipolar transistors 142 & 144 and 146 & 148. The base electrodes of the transistors 142 and 148 are commonly coupled to receive an input signal LOn, and the base electrodes of the transistors 144 and 146 are commonly coupled to receive an input signal LOp, the signals LOp and LOn forming a differential input signal (at an LO input port) to be mixed with the differential input signal RFp, RFn (at the RF input port). The emitter electrodes of the bipolar transistors 142 and 144 are commonly connected to the collector electrode of the bipolar transistor 132, and the emitter electrodes of the bipolar transistors 146 and 148 are commonly connected to the collector electrode of the bipolar transistor 134, of the voltage-current converter 130. The collector electrodes of the bipolar transistors 142 and 146 are commonly coupled (via a resistance Rip) to a source of reference potential Vpp, to which the collector electrodes of the bipolar transistors 144 and 148 are also commonly coupled (via a resistance Rin).

[0015] An AC coupling cell 150 is constituted of capacitors Cn and Cp. One electrode of the capacitor Cn is connected to the commonly connected collector electrodes of the bipolar transistors 142 and 146, and one electrode of the capacitor Cp is connected to the commonly connected collector electrodes of the bipolar transistors 144 and 148. As will be explained below, the capacitors Cn and Cp may be realised as a programmable capacitor structure (not shown) to allow their capacitance to be varied.

[0016] An output chopper cell 160 is constituted of two pairs of MOSFET chopper transistors 162 & 164 and 166 & 168. The chopper transistors 162-168 are coupled to receive chopper clock signals clkp and clkn and are connected to the AC coupling cell 150 to the receive voltage signals Vnc and Vpc from the capacitors Cn and Cp respectively. The outputs of the chopper elements 162 and 164 are cross-coupled to produce differential output signals Von and Vop (at a BB output port), which are mixed from the differential input signals RFn & RFp (at the RF input port) and LOp & LOn (at the LO input port).

[0017] The performance of the AC chopping mixer 100 circuit may be analysed as follows:

[0018] At the chopper output stage, the differential output versus the differential input relation is given by:

[0019] Vop=Vpc and Von=Vnc when clkp is active (clkp=1, clkn=0)

[0020] Vop=Vnc and Von=Vpc when clkn is active (clkp=0, clkn=1).

[0021] This results in the equalities

[0022] Vop−Von=Vpc−Vnc when clkp is active, and

[0023] Vop−Von=−(Vpc−Vnc) when clkn is active.

[0024] Thus, the differential input Vp−Vn is multiplied by the clock signal clk such the signal Vp−Vn is downconverted from clk to DC, so

Vop−Von=(clkp−clkn)(Vpc−Vnc).

[0025] However, for the common mode the situation is different, i.e., the common mode output versus the common mode input relation is given by:

[0026] Vop+Von=Vpc+Vnc when clap is active, and

[0027] Vop+Von=Vpc+Vnc when clkn is active.

[0028] Thus, the common mode at the chopper stage output is the same as the input, so

Vop+Von=Vpc+Vpn.

[0029] Thus, it can be seen that the chopper stage does not change the common mode signals input.

[0030] Also it will be understood that the RF mixer cell will behave like the chopper stage, i.e., the differential output versus the differential input relation will be given by the following:

[0031] When LOn is active (LOn=1, LOp=0), then

[0032] Vp−Vcc=−Rip.Ip and Vn−Vcc=−Rin.In, and

[0033] When LOp is active (LOn=0, LOp=1), then

[0034] Vp−Vcc=−Ri Ip and Vn−Vcc=−Rin Ip.

[0035] So,

[0036] Vp−Vn=Ri(In−Ip) when LOn is active, and

[0037] Vp−Vn=Ri(Ip−In) when LOp is active.

[0038] Therefore, Vp−Vn=(LOp−LOn)Ri(Ip−In).

[0039] Also, the common mode output versus the common mode input relation is given by:

[0040] Vp+Vn=−Ri(Ip+In)+2 Vcc when LOn is active, and

[0041] Vp+Vn=−Ri(Ip+In)+2 Vcc when LOp is active,

[0042] so it will be appreciated that the RF mixer stage does not change the common mode signal input.

[0043] Although the V-I converter is idealized as a linear stage, it will in practice introduce non-linear behavior on the output current that could be modelled as a polynomial relation versus the voltage input Vip and Vin. Considering only the second order output current and discarding the useful signal gives the following relations:

Ip=a2p(Vip)²,

and

In=a2n(Vin)²

[0044] The generated second order current components will appear at low frequency. These second order currents generate a common mode current signal

Ip+In=a2p(Vip)² +a2n(Vin)²

[0045] which will result at the RF mixer output as a common mode voltage signal, i.e.,

Vp+Vn=−Ri(a2p(Vip)² +a2n(Vin)²)+2Vcc

[0046] that occupies the same spectrum as the current signal, i.e., at low frequency, so that the AC coupling network will reduce the content in those low frequencies (the AC coupling corner frequency may be chosen to lie in the range of approximately 2.5% to 5% of the chopping clock frequency, and may be variable within this range by use of a programmable capacitor structure as mentioned above).

[0047] Also, considering the single ended voltage at the RF mixer output for those second order components (supposing now that Rip is different from Rin (i.e., there is resistor mismatch), produces the following relations:

[0048] Vp=Vcc−Rip a2p (Vip)² when LOn is active, and

[0049] Vp=Vcc−Rip a2n (Vin)² when LOp is active,

[0050] allowing Vp to be expressed as:

Vp=Vcc−Rip(a2p(Vip)² +a2n(Vin)²)/2+(LOp−LOn)Rip(a2p(Vip)² −a2n(Vin)²)/2,

[0051] and Vn to be expressed as

Vn=Vcc−Rin(a2p(Vip)² +a2n(Vin)²)/2−(LOp−LOn).Rin.(a2p(Vip)² −a2n(Vin)²)/2.

[0052] On both Vp and Vn, the term Rix (a2p (Vip)²+a2n (Vin)²)/2 appears as the low frequency common mode variation due to the second order components that will be DC blocked by the capacitors and reduced. The term (LOx−LOn) Rix (a2p (Vip)²−a2n (Vin)²)/2 will be shifted by the local oscillator frequency so it will be easy filtered such that its contribution is minimized.

[0053] Discarding the second term allows Vpc and Vnc to be expressed as:

Vpc=Hpc*Vcc−Rip(a2p(Vip)² +a2n(Vin)²)/2*Hpc,

[0054] where Hpc is a high pass filter on the positive path and * denotes a convolution operation, and

Vnc=Hnc*Vcc−Rin(a2p(Vip)² +a2n(Vin)²)/2* Hnc,

[0055] where Hnc is a high pass filter on the negative path and * denotes a convolution operation.

[0056] At the output chopper, the following relations are satisfied:

Vop+Von=Vpc+Vnc,

and

Vop−Von=(clkp−clkn)(Vpc−Vnc),

[0057] producing the relations:

Vop+Von=(Hpc+Hnc)*Vcc−(a2p(Vip)² +a2n(Vin)²)/2*(RipHpc+RinHnc),

[0058] the second order common mode component being reduced by the AC coupling, and

Vop−Von=(clkp−clkn)(Hpc−Hnc)*Vcc+(clkp−clkn)(a2p(Vip)² +a2n(Vin)²)/2)*(RinHnc−RipHpc).

[0059] This assumes a perfectly matched output chopper stage, i.e., {clkp}={clkn}. However, a non-perfectly matched output chopper (e.g., due to non-50% duty cycle clock or non-similar switches) will limit the reduction of differential second order component and will generate a term value that is equal to

(dutycycle−50%)(a2p(Vip)² +a2n(Vin)²)/2*(RinHnc−RipHpc).

[0060] In this case, the AC coupling will provide additional IP2 gain improvement versus a non-AC-coupling network if (Rin Hic−Rip Hpc) is much smaller than (Rin−Rip) in the low frequency region (0 to 200 KHz). However, the second order non-linearities that are introduced by the output chopper will limit the IM2 differential performances.

[0061] Referring now to FIG. 3, a second AC chopping mixer 200 (which may be used as an alternative to the AC chopping mixer 100 described above) shares many components with the mixer 100, and these shared components are given the same reference numerals in FIG. 3 as in FIG. 1.

[0062] The second AC chopping mixer 200 differs from the mixer 100 in that (whereas in the first mixer 100 the LO input is coupled directly to the mixer cell 140, and the RF input is coupled to the mixer cell 140 via a chopping cell 120 and a voltage-current converter cell 130) in the second mixer 200 the LO input is coupled to the mixer cell 140 via a chopper cell 220 (constituted of MOSFET chopper transistors 222, 224, 226 and 228), and the RF input is coupled to the mixer cell 140 via the voltage-current converter cell 130. It will be seen that in the second mixer 200, as in the mixer 100, the output of the mixer cell 140 is coupled via an AC coupling cell 150 to an output chopping cell 160, whose output is connected to the BB output.

[0063] It will be appreciated that the second mixer 200 functions similarly to the mixer 100 described above. It will also be appreciated that both the first and second mixers will respond in a non-ideal manner to signals at the RF input port that differ from the local oscillator frequency at the LO input port by an integer multiple of the frequency fclk of the chopping clock signals clkn and clkp. However, it will be understood that in the second mixer 200 this non-ideal signal response is diminished, relative to the first mixer 100, by movement of the input chopping stage from the RF input port in the first mixer to the LO input port in the second mixer. In this way, it will be appreciated, the second mixer 200 offers better performance than the first mixer 100 through higher spurious response isolation.

[0064] It will be understood that the method and apparatus for improving chopping mixer performance described above provides the following advantages:

[0065] By AC coupling the bipolar mixer output when it is operating in chopping mode, an advantage is gained since the signal prior to the output chopping stage is centered at the chopping clock frequency rather than at DC.

[0066] Also, AC coupling allows removal of the common mode signal in the required frequency range of 0-200 KHz.

[0067] Also, the second order component present on each single ended output will be also DC blocked by the coupling capacitors, which results in an improvement in the second order IP2.

[0068] The chopper mixers and the RF bipolar mixer have similar behavior, their common mode output versus common mode input is equal to 1 and do not result on any frequency translation; however, the differential input will be translated in frequency. This means that only low frequency common mode signals (0-200 khz) that are generated within the whole mixer arrangement will be at the output as low frequency common mode signals. Most of these low frequency common mode signals are generated by the second order non-linearities of the mixer arrangement, mainly in the V-I converter stage, but the AC coupling will block those components and reduce their levels. 

1. A chopping mixer (100) comprising: mixer means (140) for mixing signals (Ip, In, LOp, LOn) received thereby and for producing a mixed signal (Vp, Vn) therefrom; output chopping means (160); and coupling means (150) for coupling the mixed signal to the output chopping means, characterized in that the coupling means comprises AC coupling means (Cn, Cp).
 2. The chopping mixer of claim 1 wherein the AC coupling means comprises capacitance means (Cn, Cp) for passing AC signals while blocking DC signals.
 3. The chopping mixer of claim 1 or 2 wherein the mixer means comprises a bipolar transistor mixer (142, 144, 146, 148).
 4. The chopping mixer of claim 1, 2 or 3 wherein the output chopping means (160) comprises MOSFET transistors (162-168).
 5. The chopping mixer of any preceding claim further comprising input chopping means (120, 220) for chopping an input signal applied thereto and for coupling the chopped input signal to the mixer means.
 6. The chopping mixer of any one of claims 1-4 further comprising voltage to current converter means (130) coupled to an input of the mixer means for converting a voltage signal to a current signal for application to the mixer means.
 7. The chopping mixer of any one of claims 1-4 further comprising: input chopping means (120) for chopping an input signal applied thereto and for producing therefrom a chopped input voltage signal; and voltage to current converter means (130) coupled between the input chopping means and the mixer means for applying thereto a current signal representative of the chopped input voltage signal.
 8. The chopping mixer of any one of claims 1-4 further comprising: input chopping means (220) coupled to a first input of the mixer means for applying thereto a chopped input signal applied to the input chopping means; and voltage to current converter means (130) coupled to a second input of the mixer means for applying thereto a current signal representative of a voltage signal applied to the voltage to current converter means.
 9. The chopping mixer of claim 5, 7 or 8 wherein the input chopping means (120, 220) comprises MOSFET transistors (122-128, 222-228).
 10. The chopping mixer of any preceding claim wherein the signals are differential signals.
 11. The chopping mixer of any preceding claim wherein the AC coupling means has a corner frequency that is in the range of approximately 2.5% to 5% of the frequency of the chopping means.
 12. A direct conversion radio receiver (110) comprising a chopping mixer as claimed in any one of claims 1-11.
 13. A method for operating a chopping mixer (100), the method comprising: providing mixer means (140) for mixing signals (Ip, In, LOp, LOn) provided thereto and for producing a mixed signal (Vp, Vn) therefrom; providing output chopping means (160); and providing coupling means (150) for coupling the mixed signal to the output chopping means, characterized in that the coupling means comprises AC coupling means (Cn, Cp).
 14. The method of claim 13 wherein the AC coupling means comprises capacitance means (Cn, Cp) for passing AC signals while blocking DC signals.
 15. The method of claim 13 or 14 wherein the mixer means comprises a bipolar transistor mixer (142, 144, 146, 148).
 16. The method of claim 13, 14 or 15 wherein the output chopping means (160) comprises MOSFET transistors (162-168).
 17. The method of any one of claims 13-16 further comprising providing input chopping means (120, 220) to chop an input signal applied thereto and coupling the chopped input signal to the mixer means.
 18. The method of any one of claims 13-16 further comprising providing voltage to current converter means (130) coupled to an input of the mixer means to convert a voltage signal to a current signal to apply to the mixer means.
 19. The method of any one of claims 13-16 further comprising: providing input chopping means (120) to chop an input signal applied thereto and to produce therefrom a chopped input voltage signal; and providing voltage to current converter means (130) coupled between the input chopping means and the mixer means to apply thereto a current signal representative of the chopped input voltage signal.
 20. The method of any one of claims 13-16 further comprising: providing input chopping means (220) coupled to a first input of the mixer means to apply thereto a chopped input signal applied to the input chopping means; and providing voltage to current converter means (130) coupled to a second input of the mixer means to apply thereto a current signal representative of a voltage signal applied to the voltage to current converter means.
 21. The method of claim 17, 19 or 20 wherein the input chopping means (120, 220) comprises MOSFET transistors (122-128, 222-228).
 22. The method of any one of claims 13-21 wherein the signals are differential signals.
 23. The method of any one of claims 13-22 wherein the AC coupling means has a corner frequency that is in the range of approximately 2.5% to 5% of the frequency of the chopping means. 